In recent years, nonvolatile semiconductor memory apparatuses in which writing and erasing can be electrically performed have become more and more sophisticated. Examples of such nonvolatile semiconductor memory apparatuses include EEPROMs (Electrically Erasable Programmable Read Only Memories), and MONOS (Metal Oxide Nitride Oxide Semiconductor) memories with gates having MONOS structures are being considered as major candidates for next-generation flash memories.
A memory cell of a MONOS memory has a stack structure formed with a control gate electrode, a block insulating film, a charge trapping film, a tunnel insulating film, and a substrate in this order from the top. In this structure, writing is performed by applying a high voltage to the gate electrode to inject and store electrons from the substrate into the charge trapping film via the tunnel insulating film. Erasing is performed by applying a reverse bias to the gate electrode to inject holes from the substrate into the charge trapping film via the tunnel insulating film. In this manner, electrons and holes stored in the charge trapping film pair-annihilate. It is considered that use of such a structure will reduce the problems in conventional floating-gate nonvolatile semiconductor memory apparatuses, such as interferences between adjacent cells and corruption of stored data due to defects in the tunnel insulating film.
However, MONOS memories in practical use have the problem of poor reliability. Particularly, degradation of the tunnel insulating film due to write stress and erase stress that are repeatedly applied is a serious problem, as data retention characteristics are degraded by degradation of the tunnel insulating film. Therefore, to use MONOS memories as next-generation nonvolatile memories, it is essential to improve the resistance to rewriting.